MINNESANORDNING, INNEFATTANDE TVA PAR ATKOMSTLEDNINGAR

摘要

In a memory array, dual port capability is achieved by an arrangement of the memory cells such that for each cycle of the memory operation two accesses may be performed. This result is achieved by taking advantage of the bit line precharging interval. A second bit line accessing pair is added to each memory element, and each cycle is split so that when one bit line is in the accessing mode, the other bit line is in the precharging mode. Using this technique the speed of the memory is effectively doubled.