| 摘要 |
<p>PURPOSE:To prevent the malfunction of a computer device by providing a means to deliver the 1st and 2nd reset signals as an OR signal and then delivering instantaneously the reset signal when the abnormal drop of the voltage level is detected. CONSTITUTION:When the voltage VCC to be monitored has a drop and the voltage VS divided by resistances 21 and 22 is less than the level VREF of the reference voltage 23, a comparator 24 detects the abnormality and an R/S-FF 25 is reset by the information on the abnormality. Thus a transistor 26 is turned on to start the discharge of a capacitor 41. When this discharge progresses and the potential V1 of the capacitor 41 is less than the potential V2 obtained by dividing the VCC by resistances 30 and 31, this abnormality is detected by a comparator 34. At the same time, the output Q of the FF 25 and the output of the comparator 34 are applied to the NOR circuit of a reverse RESET signal output part 44. Thus the reverse RESET signal is delivered.</p> |
