发明名称 |
LOGIC BINARY CIRCUIT |
摘要 |
A logic inverter or NOR circuit exhibits push-pull output characteristics by employing a saturated (T3) feedback technique. This approach allows for emitter follower like up level drive (by T2) and transient low impedance down level drive (through T1 and T3). The disclosed saturated feedback technique improves capacitive drive capability, reduces both load and circuit delay and reduces circuit power dissipation. |
申请公布号 |
JPS6298913(A) |
申请公布日期 |
1987.05.08 |
申请号 |
JP19860243331 |
申请日期 |
1986.10.15 |
申请人 |
INTERNATL BUSINESS MACH CORP <IBM> |
发明人 |
JIIN JIYOSEFU GAUDENJI;DENISU KONUEI RIIDEI |
分类号 |
H03K17/04;H03K19/013;H03K19/082 |
主分类号 |
H03K17/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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