发明名称 INPUT BUFFER CIRCUIT
摘要 PURPOSE:To make the entire current of the titled circuit nearly zero when an input signal of a power voltage level or so is given by providing the 1st control circuit controlling a current level of a constant current circuit and the 2nd control circuit inputting an input level signal and controlling the 1st control circuit. CONSTITUTION:When a signal VI1 is at the TTL level, since an effective voltage between a gate and a source of an element P4 is large, no effect is given to a control system comprising elements P3 and N4. When the level of the signal VI1 approaches a level VD1 gradually, since the capability of the element P4 is deteriorated, a current flowing to a control circuit system comprising the elements P3, N4 is suppressed, the potential at a point 5 is increased gradually and the potential difference between the points VD1 and 5 reaches a threshold voltage of the element P2 or below and a current of a constant current circuit comprising the elements P2, N2 and N3 is lost. On the other hand, the gate-source voltage of the element N1 is increased much larger, that is, since the capability of the element N1 is increased gradually, the level of a point Vo1 is drawn to a common potential VS1. Thus, when a power voltage level is given to the input, the current consumption is made nearly zero.
申请公布号 JPS6298911(A) 申请公布日期 1987.05.08
申请号 JP19850238856 申请日期 1985.10.25
申请人 SEIKO EPSON CORP 发明人 UEMATSU AKIRA
分类号 H03K19/0185 主分类号 H03K19/0185
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