发明名称 A clamping circuit
摘要 The clamping circuit clamps a threshold of an analog to digital converter to a signal level just below the black level of a television signal. During the blanking period, a negative-going peak is superimposed on the input signal to produce the waveform 76. Each time this crosses the 0000,0001 threshold of the ADC, the polarity of the output 77 of a comparator changes. The comparator compares the ADC output and a reference value. The input signal is biased according to the integral of the comparator output. When signal levels are stable, the comparator output is symmetrical, its integral is zero and no change occurs in the biassing. If signal levels drift, the negative going peak crosses the threshold for the second time relatively sooner or later. The comparator output becomes assymmetric and has a non-zero integral. Consequently, the biassing level changes to compensate for the drift. <IMAGE>
申请公布号 GB2181912(A) 申请公布日期 1987.04.29
申请号 GB19860011863 申请日期 1986.05.15
申请人 * RANK CINTEL LIMITED 发明人 JOHN DAVID * MILLWARD;KEVIN DAVID * BROWN
分类号 H03M1/00;H04N5/18 主分类号 H03M1/00
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