发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To reduce the connection resistance of conductive layers by a method wherein, of the connecting parts of the first layer and the second multiple conductive layers connecting to the former, the impurity concentration in the first conductive layer of the first connecting part of lowered than that is the remaining first conductive layer of the second connecting part. CONSTITUTION:A dual layered film comprising a polycrystalline silicon layer 5A and a silicide layer 5B is formed on the overall surface of semiconductor substrate 1 and then the overall surface of silicide layer 5B is ion-implanted with phosphorus. The silicide layer 5B and the polycrystalline silicon layer 5A below the former 5B are patterned by etching process. A resist mask used for the etching process is left as it is without removing even after the etching process. First, another resist mask for ion-implantation to form an n<+> type semiconductor region 7 to be a source.drain region of n channel MISFET is formed. Second, the semiconductor substrate 1 is ion-implanted with arsenic to form the n<+> type semiconductor region 7. Through these procedures, two times of ion-implantation can be performed to form the source.drain region of n channel MISFET so that a part of silicide layer 5B connecting to an aluminum layer may be implanted with arsenic at low concentration.
申请公布号 JPS6281042(A) 申请公布日期 1987.04.14
申请号 JP19850220001 申请日期 1985.10.04
申请人 HITACHI LTD 发明人 TANIGAKI YUKIO;TAKAMATSU AKIRA;IKEDA SHUJI;SASAKI KATSUTO;YAMAMOTO AKIRA;KOIKE ATSUYOSHI;MORIBE SHUNJI
分类号 H01L21/8234;H01L21/3205;H01L21/768;H01L21/8244;H01L27/08;H01L27/088;H01L27/10;H01L27/11 主分类号 H01L21/8234
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