发明名称 CMOS SEMICONDUCTOR DEVICE
摘要 PURPOSE:To improve the latchup withstand of a semiconductor device by forming a well region on a part of an epitaxial substrate, and forming an N- channel MOS transistor therein and a P-channel transistor at the position separated therefrom to construct a CMOS inverter. CONSTITUTION:A P-well region 7 is formed on an N-type epitaxial substrate 1, N-type source and drain regions 9, 11 are formed therein as an N-channel MOS transistor 3, P-type drain and source regions 19, 21 are formed in the portion that no region 7 exists as a P-channel MOS transistor 5, thereby forming MOS inverter. In this structure, the thickness of the substrate 1 is approx. 4mum, a trench deeper than 2mum is opened between the transistors 3 and 5, semiconductor substance enclosed by an oxide film is buried to separate the transistors 3, 5. Thus, a voltage for holding the latchup state of a parasitic thyristor can be applied.
申请公布号 JPS6276758(A) 申请公布日期 1987.04.08
申请号 JP19850217128 申请日期 1985.09.30
申请人 TOSHIBA CORP 发明人 SHIBATA KENJI;TAGUCHI SHINJI;NIITSU YOICHIRO;KANZAKI KOICHI
分类号 H01L27/08;H01L21/76;H01L21/762;H01L21/8238;H01L27/092 主分类号 H01L27/08
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