| 摘要 |
An integrated circuit arrangement including an infrared sensitive silicon substrate having an epitaxial layer with integrated electronic processing devices applied to the major surface thereof, wherein the epitaxial layer is partially etched away to expose the detector region of the substrate. The exposed detector region is then connected to the processing devices by either a shallow diffusion or by other means. A method for producing such an arrangement, preferably using a crystal orientation dependent etching medium for etching the epitaxial layer, is also disclosed.
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