| 摘要 |
Frequency modulator with PLL stabilisation, comprising a re-adjusted oscillator, to which an AF is fed as a modulation, and a control loop comprising a divider, a reference, a phase comparator and a loop filter. A compensation signal is derived from the AF by means of which the pulse width of the divided oscillator signal can be modified in a pulse width modulator in the control loop downstream of the divider (:N).
|
