| 摘要 |
<p>PURPOSE:To attain rearrangement without demultiplexing a multiplex signal by dividing an inputted multiplex signal into two, delaying the one and replacing the signal based on an added identifier. CONSTITUTION:The circuit is provided with means 31-36 delaying a 1st branch signal from a 2nd branch signal by a prescribed time slot. Moreover, signal replacement means 11-16 comparing an identifier included in the 1st branch signal and an identifier included in the 2nd branch signal at a prescribed interval of time slots, outputting a signal including a larger identifier as a large identifier signal and outputting a signal including a smaller identifier as a small identifier signal are provided. Furthermore, multiplexer means 21-26 multiplexing alternately the large identifier signal and the small identifier signal and revising the sequence of multiplexing in the unit of a prescribed time slot are provided. Thus, the rearrangement of multiplex signals is implemented without increasing the circuit scale and without demultiplexing the multiplex signals.</p> |
