| 摘要 |
PURPOSE:To reduce occupied area and to enable high-speed drive, by providing a C-MOS inverter circuit between an output inverter circuit and logic circuits as a buffer. CONSTITUTION:C-MOS inverters 10, 11 are provided between output inverter circuits 8, 9 and logic circuits 12, 13. When a chip-enable signal CS is at high level, MOS-FETs 121, 131 are off and 122, 132 are on, and if the input signal to a terminal 1 is 0, the output signal at the terminal 2 is 0, and if the input signal is 1, then the output signal is 1. On the other hand, when the signal CS is at a low level, FETs 121, 131 are on and 122, 123 are off, and the output of C-MOS circuits (121, 122) (131, 132) is set always to 1 to cause cut off the base of the transistor 8 and the gate of MOS-FET 9. Thus, the output terminal 2 is floated. |
