| 摘要 |
<p>PURPOSE:To provide an excellent frame synchronization return characteristic by applying pattern collation not only at a frame position but also with respect to all bit locations for an output of a violation detecting circuit and a frame signal outputted from a frame counter. CONSTITUTION:A violation of an input signal is detected by a violation detecting circuit 1. A frame counter 3 is reset by a reset circuit 2 at the violation position. An output of the frame counter 3 reset by a reset circuit 4 and a position of the violation detected by the violation detection circuit 1 are compared, and when they are dissident, the frame counter 3 is reset by the reset circuit 2 via a synchronization protection circuit 5. When coincident, the synchronization state is attained as it is. If a violation is detected even at a position other than the position of the frame counter in the violation detection circuit, since all the bit locations 10 are compared, an error pulse is outputted from a comparator circuit.</p> |
