| 摘要 |
Access control to a serially reusable resource is exercised synchronously by sampling circuits (Reg 1, 2, 3; 11, 15, 19) individual to each processor and an n-way compare circuit 39. If selected or not, the appropriate form of acknowledgement signal is transmitted by each sampling circuit (by 49) to the processor so that resource assess is among concurrent asynchronous processors is governed by either task execution invoked by an external response indicating its low bid among the well-ordered set of most recently bid signals, task deferred until such indication is received from subsequent bid evaluations, or task aborted as by transfer to another task upon indication that an instantaneous bid was not the minimum. |
