发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To provide memory function in an MOS transistor itself by controlling the amplitude of a voltage applied to the gate and drain of an MOS transistor formed on an insulator. CONSTITUTION:A sensing circuit 30 writes, erases and reads out information to control the amplitude and timing of a voltage applied to a gate 25 and a drain 23. The circuit 30 applies a voltage of the degree not generating an impact ionization to the drain 23 at writing time, applies a voltage of threshold value or higher to the gate 25, and then abruptly set the gate voltage to zero. It applies a voltage of the degree for generating impact ions to the drain 23 at erasing time, applies a voltage of threshold value of higher to the gate 25, and then abruptly sets the gate voltage to zero. It applies a gate voltage of threshold value or higher in the state that a voltage of the degree not generating an impact ionization is applied to the drain 23 at writing time.
申请公布号 JPS627150(A) 申请公布日期 1987.01.14
申请号 JP19850144574 申请日期 1985.07.03
申请人 AGENCY OF IND SCIENCE & TECHNOL 发明人 IKEDA HIROSHI;KATO KOICHI
分类号 G11C11/34;H01L21/8242;H01L27/10;H01L27/108 主分类号 G11C11/34
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