| 摘要 |
PURPOSE:To inhibit a wiring region minimally, and to design wirings minimizing the area of a chip by conducting wirings by a first layer metallic wiring when only two adjacent blocks are connected mutually and conducting wirings by a second layer metallic wiring when three or more of blocks are connected mutually and when there is another block between blocks to be wired. CONSTITUTION:Wiring groups 101-107 mutually connecting adjacent blocks function as first layer metallic wirings. A-G represent functional blocks, insides thereof are connected only by the first layer metallic wirings. That is, the internal wirings of the functional blocks of A-G are conducted only by the first layer metallic wirings, and wirings mutually tying adjacent blocks may be extended from the insides of several functional block, or may be connected among the peripheral sections of respective functional block. On the other hand, a wiring group 201, in which there are a block B and a block C between the wired blocks A-G, a wiring group 202 mutually tying three blocks of blocks E-C-B and a wiring group 203 mutually connecting four blocks of blocks C-F-G-E function as second layer metallic wirings. |
