发明名称 PARALLEL TYPE ANALOG-DIGITAL CONVERTER
摘要 PURPOSE:To prevent malfunction and to improve the linearity by providing a buffer amplifier between an input switch and a coupling capacitor in a comparator in a converter using the AC coupling type comparator so as to eliminate spike noise appearing at the input signal terminal and eliminating fluctuation of a reference potential. CONSTITUTION:Buffer amplifiers 68-74 are provided respectively between input switches 47-60 and capacitors 40-46 in each comparator each consisting of inverters 33-39, the coupling capacitors 40-46 in each comparator each consisting of inverters 33-39, the coupling capacitors 40-46 band the switches 40-67. Through the constitution above, the spike noise synchronously with the clock appearing at the input signal terminal of the converter is reduced and the A/D conversion error due to the fluctuation caused by the noise is prevented, and it is not required to provide a current to charge the coupling capacitor again at each reference potential input point so as to improve the linearity of the A/D conversion and the conversion speed. In this case, complementary MOSFETs are used for the buffer amplifiers so as to attain small and simple circuit constitution.
申请公布号 JPS61292421(A) 申请公布日期 1986.12.23
申请号 JP19850134562 申请日期 1985.06.20
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YOSHIZAWA HIROSHI
分类号 H03M1/36 主分类号 H03M1/36
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