发明名称 BUFFER REGISTER
摘要 PURPOSE:To attain both reading and writing operations simultaneously in a simple constitution by providing a means to select and supply data to an optional bit of a shift register with a pointer. CONSTITUTION:Shift registers S10-S43 supply the data on data input terminals I0-I3 and perform the shift operations synchronously with a read signal QRD 16 sent from a queue buffer register. When the write signal QWR is active, the input data on the terminals I0-I3 are written to the registers S10-S43 after the queue pointers P0-P4 are shifted to the left. At the same time, the data on the registers S10-S13 are delivered from output terminals O0-O3. While those queue pointers are shifted to the right when the signal QRD is active. Then all outputs keep their previous states when both signals QWR and QRD are inactive.
申请公布号 JPS61292747(A) 申请公布日期 1986.12.23
申请号 JP19850134766 申请日期 1985.06.20
申请人 NEC CORP 发明人 FUKUSHIMA KIYOSHI;MIYATA SHINJI
分类号 G06F5/08;G06F5/06;G06F9/38 主分类号 G06F5/08
代理机构 代理人
主权项
地址