| 摘要 |
PURPOSE:To detect easily the trouble of a clock signal generating circuit by providing a clock signal generating circuit and a timer counter to each computer system. CONSTITUTION:A system A consists of a clock signal generating circuit 2, a timer counter 3 and a computer MPU1. While a system B is provided with a clock signal generating circuit 4 a timer counter 5 and a computer MPU2 respectively. The clock signal CL1 delivered from the circuit 2 is supplied in parallel to both computers MPU1 and MPU2. While the outputs of both counters 3 and 5 are also supplied in parallel to both computers MPU1 and MPU2 respectively. These computers MPU1 and MPU2 read the counter values Sa and Sb given from the counters 3 and 5 respectively. Then a deciding circuit 6 decides whether the error between the read values Ra and Rb is kept within an allowable range or not.
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