发明名称 CLOCK DISTRIBUTING SYSTEM
摘要 PURPOSE:To reduce quantity of hardware by providing a specific AMI code between a DCS (digital clock supplying device) and an NCLK (channel clock device) and the clock supply route of a specific MD code between the NCLK and LCNE (concentrated speech path equipment). CONSTITUTION:The AMI code of 64 KHz + 8 KHz + 0.4 KHz is received by the NCLK from the DCS and the extraction of timing and the extraction of frame signals are made, and the MD code of 2 MHz + 8 KHz + 0.4 KHz is distributed from the NCLK to each LCNE. The LCNE receives the MD code by 2MINF module and extracts clock of 0.4 KHz and prepares timing of 16 MHz by a PLO circuit. Thus, not only the clock of 8 KHz, the clock of 0.4 KHz necessary for the transmission system of a digital subscriber's line which is for 20 frames of 8 KHz can be supplied with small quantity of hardware by the MD signal of 2 MHz which is the standard of intra-office interface.
申请公布号 JPS61290832(A) 申请公布日期 1986.12.20
申请号 JP19850131778 申请日期 1985.06.19
申请人 HITACHI LTD 发明人 OGURI YOZO
分类号 H04J3/06;H04L7/00;H04L7/02;H04L7/033 主分类号 H04J3/06
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