发明名称 MULTIPROCESSOR SYSTEM
摘要 <p>PURPOSE:To make a ROM of a slave memory unnecessary to use an overall area as a shared memory by inhibiting start of a slave processor until execution of initial program load (IPL) for the slave processor is completed. CONSTITUTION:When a master processor 1 is started, a microprogram on a ROM m3 as a master memory is started to execute IPL of an IPL program for slave processors (1)12 and (n)17 to a RAM m2, and the master processor 1 executes this program. Thus, pertinent processing programs are initially loaded to slave memories RAM (1)13 and (n)18 from an auxiliary storage device 10. Thereafter, the master processor changes the signal from a control circuit 31 to the permission state, and the slave processor whose start is permitted starts the program processing on the slave memory.</p>
申请公布号 JPS61288262(A) 申请公布日期 1986.12.18
申请号 JP19850129823 申请日期 1985.06.17
申请人 HITACHI LTD 发明人 YOKOTA MASAYUKI
分类号 G06F15/17;G06F9/445;G06F15/16;G06F15/177 主分类号 G06F15/17
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