| 摘要 |
PURPOSE:To decrease the time required for attaining frame synchronism by deciding it as the synchronism state by means of a frame synchronism deciding device when any of plural frame synchronism pattern detectors detects synchronism. CONSTITUTION:A clock in synchronizing with an input digital signal is frequency-divided by a 1/2 frequency divider 101 and fed to a converter 102, frame synchronism pattern detectors 107, 108 and frame synchronism deciding devices 109, 110. Two series of signals from the converter 102 are inputted respectively to the frame synchronism pattern detectors 107, 108, from which the synchronism pattern is detected individually. The frame synchronism deciding device 109 decides it as the synchronism state when the frame synchronism pattern detectors 107, 108 detect the synchronism. |
