发明名称 ERROR COUNTER CIRCUIT
摘要 PURPOSE:To detect a state with sufficiently large error rate in a short time by constituting the circuit that a period of a trigger pulse setting a counter circuit counting an error pulse number is switched into a short period depending on the counter of a prescribed error pulse number. CONSTITUTION:A trigger pulse with a longer period is outputted to a signal line 506 and a trigger pulse of a shorter period is outputted to a signal line 505 respectively from a trigger pulse generating circuit 5. This trigger pulse is selected by a selection circuit 6 and the result is applied to a counter circuit 2. The counter circuit 2 is set by said trigger pulse and counts an error pulse from a signal line 201 and when the error pulse is counted by a prescribed number, the output state is changed. Said selection circuit 6 selects a trigger pulse in a short period depending on the change in the output state and applies the selected result to the counter circuit 2. When a storage circuit 3 detects the output state change of the counter circuit 2 consecutively three times, the circuit 3 raises warning. Through the constitution above, the stae having a sufficiently large error rate is detected in a short time.
申请公布号 JPS60169222(A) 申请公布日期 1985.09.02
申请号 JP19840024741 申请日期 1984.02.13
申请人 NIPPON DENKI KK 发明人 IGUCHI HIROTO
分类号 H03K21/40;H04L1/00 主分类号 H03K21/40
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