发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To secure reading order with no deterioration of performance for a data processor which starts the processing of an estimated instruction, by supplying an acceptance inhibiting state to another buffer storage device to inhibit the acceptance of a request given to said buffer storage device. CONSTITUTION:When a buffer memory device 8 or 9 is set under an acceptance inhibiting state, the lines 810 and 910 showing the acceptance inhibiting state are supplied to the device 9 or 8 at the other side. Then the acceptance of a request to the device 9 or 8 and therefore the reading order can be secured. Furthermore the performance is never deteriorated since no request is accepted to the device 9 or 8 at the other side only when the device 8 or 9 at one side is set under an acceptance inhibiting state.
申请公布号 JPS61279937(A) 申请公布日期 1986.12.10
申请号 JP19850120465 申请日期 1985.06.05
申请人 HITACHI LTD 发明人 WADA KENICHI;ABE SHUICHI;KURIYAMA KAZUNORI;YAMAOKA AKIRA
分类号 G06F9/38 主分类号 G06F9/38
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