| 摘要 |
PURPOSE:To separate and extract phase error information in high speed by converting an input digital signal series into phase information and applying algebraic processing based on the result of discrimination with respect to the transition state of the phase information. CONSTITUTION:A signal in a couple of orthogonal phase relations obtained by separating a digital modulation signal into two orthogonal signals at the reception side is inputted to terminals 1, 2, and converted into a digital signal series by A/D converters 3, 4 and inputted to a conversion table 5. An output signal of the conversion table 5 is inputted to a subtractor 6, where a carrier phase component is eliminated to form a carrier phase synchronous detection output, which is inputted to a transition state discrimination circuit 7 and a separation circuit 8. The separation circuit 8 separates the output signal of the subtractor 6 into, e.g., recovered carrier phase error information and sampling clock phase error information at the A/D converters 2, 3 based on the result of discrimination of the transition state discrimination circuit 7. |
