发明名称
摘要 <p>PURPOSE:To perform a high speed operation without using any timing signal from the outside and, at the same time, reduce the power consumption of a storage device using insulated gate field effect transistors (MISFETs), by generating timing signals through the change of address input signals. CONSTITUTION:When address input signals inputted into terminals A0-An-1 change, two input signals of an exclusive OR circuit EXOR50 in a change of input signal detecting circuit 5 change with a time difference and a pulse signal of a logic ''1'' appears on the output line 6 of the EXOR50 during the period of this time difference. When an MISFET71 in a control signal generating circuit 7 of a dynamic circuit is turned on and the electric charge of a capacitor 73 is discharged, the voltage across the terminals of the capacitor 73 drops and MISFETs75 and 76 are cut off and, as a result, a control signal phip becomes high level. When the output signal of the EXOR50 becomes low level and the MISFET71 is turned off, the capacitor 73 is gradually charged through an MISFET72 for load and the voltage across the terminals of the capacitor 73 is changed to high level.</p>
申请公布号 JPS6155197(B2) 申请公布日期 1986.11.26
申请号 JP19840041773 申请日期 1984.03.05
申请人 NIPPON ELECTRIC CO 发明人 KITAMURA YOSHINARI
分类号 G11C17/00;G11C17/18 主分类号 G11C17/00
代理机构 代理人
主权项
地址