发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To check the action of a refresh address counter by activating an input and output circuit by a test mode detecting signal generated when an external test signal is changed during the setting time of a test mode detecting circuit. CONSTITUTION:When a signal CE brings from a high level to a low level within a time that a signal REF becomes high level and a signal RESET becomes high level, a test mode detecting circuit 14 generates a signal TEST and supplies to a data output control circuit 13. By making a signal OE to low level, an internal signal OE1 goes to high level and a data output circuit 9 is activated and the information of a refresh memory cell is outputted to a terminal Dout. When an external signal WE is brought to a low level, a signal WE1 goes to a high level, and a data input circuit 6 is activated, and a writing to the refresh memory cell is performed. Thereby, whether a refresh address counter circuit 2 is correctly operated or not can be checked.
申请公布号 JPS61265796(A) 申请公布日期 1986.11.25
申请号 JP19850108526 申请日期 1985.05.20
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 ASANO TAKASHI;OE MASANORI;CHIJIIWA KENJI;YOCHI NOBUO
分类号 G11C11/401;G11C11/34;G11C11/403;G11C11/406;G11C29/00;G11C29/14 主分类号 G11C11/401
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