| 摘要 |
PURPOSE:To obtain an excellent picture plane without adjustment by applying DC potential on a DC inhibiting capacitor through a pedestal level clamp switch which is opened or closed by a pedestal level clamp pulse. CONSTITUTION:When a latch circuit 112 reads an output result 111 which a counting circuit 102 judges 'generally bright' with the aid of a read clock 118, an VSS not only as the output 114 of an adjusting circuit 104 but also as a low voltage is outputted to the pedestal level clamp switch 105 with the aid of the output 113 of the latch circuit. As a result, the pedestal level of a synthesized video signal inputted to an A/D converter 107 drops. On the contrary, when a latch circuit 113 reads the judgement 111 of the counting circuit 102, that is, 'overall dark', an adjusting circuit 104 outputs 114 a VDD as a high potential, thereby raising the pedestal level. |
