发明名称 |
INPUT NOISE DETECTING CIRCUIT |
摘要 |
PURPOSE:To prevent a malfunction due to an input noise by deciding a latched data as a noise if the different comparison data are obtained between said latched data and the n-th latched data signal after latching said single data. CONSTITUTION:If the 1st-3rd pulses of a data signal are equal to a single data, the output of the 1st latch circuit 1 is set at 1 by the single data on the 1st pulse. Then the single data on the 2nd pulse of the data signal is latched by the 2nd latch circuit 3 by the load signal of the 1st logical circuit 2. Thus the output of the circuit 3 is equal to 1. The outputs of both circuits 1 and 3 are compared with each other by a comparator 4. In this case, the coincidence is obtained between both outputs with 1. Thus the data signal is decided as normal and the 2nd logical circuit 5 delivers no system reset signal. If the 1st-3rd pulses of the data signal are equal to 0 and the output of the circuit 1 is equal to 1 owing to the 1st pulse, no coincidence is obtained between the outputs of circuits 1 and 3 through the comparator 4 since the 2nd pulse is equal to data 0. Thus a noise detecting circuit decides a noise and delivers the system reset signal. |
申请公布号 |
JPS61262911(A) |
申请公布日期 |
1986.11.20 |
申请号 |
JP19850105037 |
申请日期 |
1985.05.17 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
YOSHIMOTO HISASHI;SEIKE MAMORU;KUROSE SUMIO |
分类号 |
G06F3/02;H03K5/00;H03K5/1252 |
主分类号 |
G06F3/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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