| 摘要 |
<p>PURPOSE:To prolong the life of a battery by switching the operation in a low power consumption mode by dropping the frequency of a clock operating a CPU device when the battery 1 is consumed and an output level from the CPU device drops. CONSTITUTION:When the output voltage of the battery 1 drops below a normal output level V1 and is less than the prescribed level V2, the output (signal line 21) of a detector 2 comes to a high level, and J and K inputs of a JK.FF 5 is in the inverted state. Thus a JK.FF 6 is in the set state to reset a JK.FF 7, and AND gates at upper and lower sides of an AND/OR gate 8 are opened and closed, respectively. In terms of the output of the AND/OR gate 8, the signal of a clock oscillator having a lower oscillation frequency than that of a clock oscillator 4 is supplied to the CPU device 9, and therefore a CPU device 9 system goes to the low power consumption mode.</p> |
