发明名称 Method and circuit for suppressing sequential zeroes data.
摘要 <p>A method for suppressing sequential "zeroes" data and a circuit for the same, comprising, a transmitting portion and a receiving portion, and steps for detecting whether zeroes data is sequenced in a frame, inserting the datum "1" after the sequential zeroes data in the case of detecting said sequential zeroes data in the case of detecting said sequential zeroes data, sending the frame having said datum "1" inserted per said sequential zeroes data to the receiving portion and adding the portion of said frame forced out by said insertion of the datum "1" to the top portion of the next frame to said frame so as to use said forced out portion for detecting in said first step, the latter steps of detecting whether said datum "1" is inserted per said sequential zeroes data in the frame received, and deleting said datum "1" from said received frame. </p>
申请公布号 EP0201935(A2) 申请公布日期 1986.11.20
申请号 EP19860106729 申请日期 1986.05.16
申请人 FUJITSU LIMITED 发明人 OUCHI, NORIAKI
分类号 H04L13/08;H04L7/02;H04L25/49 主分类号 H04L13/08
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