发明名称 INPUT AND OUTPUT PROCESSOR
摘要 PURPOSE:To reduce an overhead and to improve the performance of an input/ output processor by storing storage addresses of a buffer memory in an address area in main storage when control information on every input/output device is loaded in the buffer memory from the main storage. CONSTITUTION:Entries to be used by a transfer circuit 30 among pieces of control information stored in the main storage 10 are utilized by reading their contents in the buffer memory 60. In this case, write entry numbers of the buffer memory 60 are stored in the address information area of the main storage 10. Then, when control information corresponding to the same input/output device is required, address information in the main storage 10 is read in the 2nd register 50 according to input/output device numbers stored in the 1st register 40. Then, the buffer memory 60 is read out on the basis of the contents of the 2nd register 50 to utilize corresponding control information.
申请公布号 JPS61260344(A) 申请公布日期 1986.11.18
申请号 JP19850102458 申请日期 1985.05.14
申请人 NEC CORP 发明人 NAKASE KUNIO
分类号 G06F13/12 主分类号 G06F13/12
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