发明名称 INTERLEAVING CIRCUIT
摘要 PURPOSE:To minimize the degradation of the error correcting capability of a product code by writing the product code in memory areas arranged in a matrix and reading out demodulated data from them by the first address generat ing means and reading out the product code and writing demodulated data by the second address generating means. CONSTITUTION:The address of a memory area in the i-th row and the j-th column out of (nXm)-number of storage areas arranged in a matrix is defined as (Ri, Cj), and a means which writes the product code in memory areas by the first address generating means generating the first address sequence expressed with a formula 1 and reads out memory areas by the second address generating means generating the second address sequence expressed with a formula 2 and performs interleaving and a means which writes demodulated data in memory areas by the second address generating means and reads out them by the first address generating means and performs de-interleaving are provided. Thus, the degradation of the error correcting capability of the product code is minimized even if the modulating system causing erroneous propagation is used.
申请公布号 JPS61260468(A) 申请公布日期 1986.11.18
申请号 JP19850101823 申请日期 1985.05.14
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TAKAGI YUJI;SATO ISAO;SUGIMURA TATSUO
分类号 G11B20/12;G11B20/18;H03M13/27 主分类号 G11B20/12
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