| 摘要 |
PURPOSE:To control and connect the output level of the interface buffer of probing while the electric power source voltage is monitored even when the target board is CMOS IC by using the CMOS micro processor. CONSTITUTION:When the connector at the tip of the probing is connected to the target, an electric power source voltage V given to the electric power source voltage monitoring circuit is supplied through resistances R1 and R2 to a transistor TR1 and turned on, the emitter electric potential is decreased and simultaneously, the clamping electric current of the clamping diode is biased to a resistance R3. On the other hand, the emitter level of a transistor TR2, which is turned on by the electric power source voltage V supplied through a resistance R4, is turned on with the delay by R1 and C1 at the TR1 side, and therefore, the level is turned on earlier than the clamping voltage and the gate output control is executed. Since the clamping voltage is turned on a little while later, the electric power source ON of the target is zero V. |
