发明名称 SEMICONDUCTOR MEMORY CIRCUIT
摘要 PURPOSE:To prevent a lowering of a reading speed owing to a deterioration of a reading power source voltage by detecting a bit line level by a feedback circuit to control a discharge of the bit line. CONSTITUTION:A feedback control circuit formed by N-type and P-type transistors N50, P20, N30 detects that a level of a bit line V10 is high, turns off the transistor N50 and raises a level of the nodal point V30. Thereby, the transistor P30 becomes further non-conductive and a level of a nodal point V50 is lowered and a transistor 70 is turned off and a level of a nodal point V60in raised. Then, a transistor N80 is turned on, an improper potential of the line V10 is discharged and rapidly lowered and a delay of a reading speed owing to a deterioration of a reading power source voltage is prevented.
申请公布号 JPS61255594(A) 申请公布日期 1986.11.13
申请号 JP19850096882 申请日期 1985.05.08
申请人 SEIKO EPSON CORP 发明人 UEMATSU AKIRA
分类号 G11C17/18;G11C11/34;G11C11/419;G11C17/00;H01L27/10 主分类号 G11C17/18
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