发明名称 METHOD FOR TESTING SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To enable the automatic measurement of a semiconductor integrated circuit having analogue adding and subtracting functions, by using an electronic type attenuator capable of being controlled by voltage or a current from the outside and having flat phase characteristics. CONSTITUTION:A predetermined input signal is coupled with the input terminals 6, 7 of a semiconductive integrated circuit 1 having analogue adding and subtracting functions through an electronic type attenuator constituted by combining a voltage control type variable capacity element and a high frequency amplifier having high input impedance and a phase regulator 5. By controlling the voltage applied to the voltage control type variable capacity element, the level adjustment of an individual integrated circuit 1 to be tested is easily performed. Phase change can be limited to a minute range and substantially neglected by coupling an input signal with the high input impedance high frequency amplifier through the series dividing constitution of a condenser.
申请公布号 JPS61256267(A) 申请公布日期 1986.11.13
申请号 JP19850098097 申请日期 1985.05.10
申请人 MATSUSHITA ELECTRONICS CORP 发明人 SAITO KAZUO;FUJI KENICHIRO
分类号 G01R31/28;G06F11/22 主分类号 G01R31/28
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