| 摘要 |
PURPOSE:To reduce a field through error and the noise of a signal line by connecting a constant voltage circuit to a switch signal line of a voltage comparator. CONSTITUTION:When switches 31, 32 are turned on a PMOS switch 23 and an NMOS switch 24 are turned off, the logical threshold voltages VLT of inverters 13, 14 are applied to the switches 21, 22 of a comparator. When the switches 31, 32 are turned off and the switches 23, 24 ar turned on, a power supply voltage VDD and a ground level are applied to the PMOS switch 22 of a comparator and the NMOS switch 21 of the comparator respectively. Consequently, a field through error due to the switching of the voltage comparator is reduced and the spike-like noise of the switch signal line can be also reduced.
|
