发明名称 ERROR CORRECTION PROCESSING OPERATION CIRCUIT
摘要 PURPOSE:To simplify the constitution of a storage element by providing a Galois field operating circuit to which a coefficient of an equation and data obtained from the coefficient are inputted to obtain an error position in the error correction processing system. CONSTITUTION:The Galois field operating circuit consists of a combination designating circuit 21, to which data rho is inputted to extract converted data having a number of bits smaller than that of data rho, and storage elements 22 and 23 to which converted data and a coefficient sigma1 are inputted to output an error position X1 or X2. 8-bit data rho is inputted to the circuit 21, and the circuit 21 outputs 5-bit converted data, and the storage element having 2<8> addresses is used for obtaining this converted data to store 5-bit converted data in each address. 5-bit converted data and the 8-bit coefficient sigma1 are inputted to elements 22 and 23 as addresses to read out the position X1 or X2. Thus, 2<(8+5)> addresses are enough in the element 22, and the number of addresses is reduced to 1/8 of 2<(8+8)>.
申请公布号 JPS61251939(A) 申请公布日期 1986.11.08
申请号 JP19850093302 申请日期 1985.04.30
申请人 FUJITSU LTD 发明人 YASHIRO MITSUHIKO
分类号 G06F11/10;H03M13/00;H03M13/15 主分类号 G06F11/10
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