发明名称 SUBSTRATE FOR MOUNTING INTEGRATED CIRCUIT
摘要 PURPOSE:To ensure higher mounting efficiency for a mounting substrate by eliminating the need for a process exclusively for the formation of resistance bodies and by eliminating the need for an addition space by a method wherein both ends of a resistance body is directly connected to a die-bonding pad and a prescribed wire-bonding pad. CONSTITUTION:First, a first layer 7 and then a second layer 8 is deposited on a substrate 1 by evaporation, sputtering, or the like. Patterning is next accomplished by photolithography for the formation of a die-bonding pad 3, wire-bonding pad 4 and a wiring pattern 5 and, simultaneously, a region is formed into a meandering pattern for the formation of resistance bodies 9a-9c. Next, the metal constituting the second layer 8 located on regions to be formed into resistance bodies 9a-9c is removed by etching or the like. This results in the embodiment of the resistance bodies 9a-9c. A substrate incorporating this technique is higher in packaging efficiency than a conventional packaging substrate wherein resistance bodies are formed in a region wherein an integrated circuit chip is installed. It follows therefore that the same number of IC chips may be packaged into a substitute dimensionally inferior to a substitute of the conventional design.
申请公布号 JPS61251046(A) 申请公布日期 1986.11.08
申请号 JP19850091185 申请日期 1985.04.30
申请人 TOSHIBA CORP 发明人 MIYAGI TAKESHI
分类号 H01L21/52;H01L21/58;H01L21/60 主分类号 H01L21/52
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