发明名称 DATA PROCESSOR
摘要 PURPOSE:To organize the pattern data of a large quantity from the stored data of a small quantity by providing a latching circuit for holding an output value at every bit digit of the pattern data, and a preset counter for counting the number of times of a repeated output of the same data value. CONSTITUTION:A data V which has been read out of a memory device is held 11, and outputted to an output line of the corresponding bit digit DX through a data value generating circuit 12 and an output gate circuit 13. In this case, an operation mode of the gate 13 is set by a data G which has been read out simultaneously. Also, a data L which has been read out simultaneously with the data V, G is held 15, and printed to a preset counter 14. This counter 14 is brought to a stepping operation by synchronizing with a common reference clock phi0, and whenever the counter 14 is brought to a stepping operation, the held 11 data V is outputted repeatedly as a data of the corresponding bit digit DX, and when a counting value of the counter 14 exceeds a preset value which has been set by the data L, a count-up signal phiC is generaed, and the memory device is made to a read-out access by the signal phiC.
申请公布号 JPS61245067(A) 申请公布日期 1986.10.31
申请号 JP19850086375 申请日期 1985.04.24
申请人 HITACHI LTD 发明人 OSAWA MASAAKI
分类号 G01R31/28;G01R31/319 主分类号 G01R31/28
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