发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To prevent the generation of undesired interruption and to shorten a debug processing time by saving the contents of a designated register to a designated memory area for each step in a debug mode and producing an interruption only said saving action reaches the boundary of the memory area. CONSTITUTION:In a debug mode a control circuit 7 checks a mask register 4 after execution of each instruction and adds the number of used memory areas to an address register 2 by an arithmetic circuit 5 after saving the contents of a designated register to a memory area designated by the register 2 to replace the register 2. Then the contents of the register 2 and a boundary register 3 are compared with each other. If the value of the register 2 is smaller than that of the register 3, the next instruction is executed. If the contents of the register 2 is equal to or larger than those of the register 3, the circuit 7 produces an interruption to give information to the shoftware.
申请公布号 JPS61241843(A) 申请公布日期 1986.10.28
申请号 JP19850083932 申请日期 1985.04.19
申请人 NEC CORP 发明人 HARUI TOSHIROU
分类号 G06F11/28;G06F11/36 主分类号 G06F11/28
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