Reset circuit for MOS imager array

摘要

A reset circuit for a MOS imager array in which a reset gate that normally has its source grounded and its gate controlled by a column signal, in order to pass a row signal to a row of imaging elements, has a high chip reset signal applied to its drain. A high chip reset signal is then passed to the row irrespective of the row signal. As a result, the imaging elements are reset on all the rows simultaneously without the need of cycling the row signal.