发明名称 ELECTRONIC CIRCUIT
摘要 PURPOSE:To make it possible to make many test modes by minimum number of terminals by enabling a terminal to which test mode inputting function is given to make the testing without losing original meaning of the terminal. CONSTITUTION:A signal S3 is a test signal from an input terminal TEST, and becomes 'H' level in the stage of the testing, and 'L' level in the state of the ordinary operation. In the state of the testing, the level of data input is latched and outputted to the terminals Q of latches 1, 2 and test mode signals TA, TB are prepared. Accordingly, a test input signal S3, the test mode signals TA, TB are inputted to a test control block 3, and a maximum of 4 modes are made possible. Thus, by providing the latch circuits 1, 2 that store 'H', 'L' of an input terminal combining to the input terminal, and making output of the latch circuit a test mode signal, it becomes possible to make many test modes by minimum number of terminals.
申请公布号 JPS61241676(A) 申请公布日期 1986.10.27
申请号 JP19850083761 申请日期 1985.04.19
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SUZUKI SHIGETO;SEIKE TADAYOSHI;NAKAMURA FUMIHISA
分类号 G01R31/28;G01R31/3185 主分类号 G01R31/28
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