发明名称 HALF TONE RECORDING SYSTEM
摘要 PURPOSE:To express and record the half tone easily and without deterioration of the resolution by including a delaying circuit, a selector circuit, an EX-OR circuit to receive the output of a clock signal and a selector circuit and the means to modulate and record by the output from the EX-OR circuit. CONSTITUTION:A delaying circuit 6 has plural delaying elements D1-D5, and these delaying elements D1-D5 are successively serially connected. Only the output of the delaying circuit 6 corresponding to the signal line to show the input density value out of lines l1-l6 is selected by a selecting circuit 7 and derived to an OR gate 9. The output from the OR gate 9 is delayed only for the period DELTAT1 and given to one side input terminal of an EX-OR gate 10. The output from the EX-OR gate 10 is given to a driving circuit 11 to drive a semiconductor laser element 12, and when the output from the EX-OR gate 10 is a high level, a laser element 12 is driven, a laser beam is modulated and irradiated to a rotating polygon mirror 14 of a scanner 13.
申请公布号 JPS61238173(A) 申请公布日期 1986.10.23
申请号 JP19850080920 申请日期 1985.04.15
申请人 MITA IND CO LTD 发明人 UEMORI SATOSHI;AOKI TERUO
分类号 H04N1/23;G03G15/04;G03G15/043;G03G15/22;H04N1/40;H04N1/405 主分类号 H04N1/23
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