| 摘要 |
PURPOSE:To prevent other CPU from being brought to runaway, as well, even if a malfunction is generated in some CPU, by providing a RAM address which is controlled by a controlling circuit so that other central processor than a specified central processor cannot execute an access. CONSTITUTION:An output line 3 of an address decoder 2 is constituted of 16 pieces. A controlling circuit is constituted of a NAND gate circuit 8 and an N-MOS transistor 9, and executes a control so that other CPU than a specified CPU cannot execute an access to a RAM 1 area of this area by a signal of a CPUact 6 for showing that the specified CPU is in an active state and a STACKact 7 for showing a stack address. In such a way, two pieces among the output lines 3 are held so as to be unusable by using a transistor 9. Accordingly, even in case one CPU causes runaway by some factor and has occupied the RAM 1, an area of 2/16 of the RAM 1 is unusable, and it can be prevented that the specified CPU executes runaway by following it.
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