| 摘要 |
PURPOSE:To enhance the integration and to accelerate a circuit by separating two or more encoder output signal wirings coupled with an encoder of a programmable logic array at an arbitrary place, and obtaining two or more encoder output signals from one wiring circuit. CONSTITUTION:A quasi-matrix encoder circuit is formed, and precharge transistors 1-3 are disposed at the right and left, and opposite side of a decoder to produce three encoder output signals from one wiring region. In other words, transistors 1-4 which input at gates a precharge signal phi, and transistors 5-10 which input at gates decoder output signals D0-Dt are provided. Signals E0-En. |
