| 摘要 |
PURPOSE:To shorten the arithmetic time to obtain the absolute value by applying the output of the 1st selection circuit to the 2nd selection circuit by the output of the 3rd selection circuit according to an arithmetic indication. CONSTITUTION:The conditions A>=0 and B>=0 are satisfied between the 1st and 2nd operands A and B. Under such conditions, (A+B) or (A-B) is carried out to obtain the positive/negative information on the result of said calculation. Then the addition absolute value ¦A+B¦ or the subtraction absolute value ¦A-B¦ is obtained to detect that these two absolute values are equal to '0'. The operand A is stored in the 1st operand register 1. While the value of the operand B is selected as it is through a selection circuit 3 when the arithmetic indicating signal 100 is equal to '0' indicating the addition. Then the '1' and '0' of each digit of the operand B are inverted and selected by an inverter 2 when the signal 100 is equal to '1' indicating the subtraction. Then the operand B is stored in the 2nd operand register 4. The arithmetic time of the absolute value can be shortened by performing the arithmetic of ¦A+B¦ or ¦A-B¦ and an operation for detection that all arithmetic results are equal to '0' with overlap to each other. |
