| 摘要 |
PURPOSE:To make a branch to an optional address according to test conditions in an additional mechanism without altering the logic of a part which is already designed by regarding test condition factors in the additional mechanism as one test condition factor on the side of a processor. CONSTITUTION:The microinstruction register 9 on the side of the additional mechanism is provided with a test condition specifying field 31 for test condition factors 17 which are increased to 1-(n) because of the connection of the additional mechanism. Consequently, the test condition factors 1-(n) are considered as one test condition factor on the side of the processor. For the purpose, the test condition factors are reserved previously in a test TST1 field 11 for the connection of one addition mechanism 1 to eliminate the need for a test condition selecting circuit 14 and alteration. Therefore, the kinds of test condition on the side of the addition mechanism and the numbers of additional mechanisms are not influenced and a signal pin neck is eliminated. |
