| 摘要 |
PURPOSE:To simplify detection processing constitution for confliction by separating a part which makes a bit comparison of store addresses by using an incrementer and a part which decides the possibility of confliction occurrence from a next instruction and a store address. CONSTITUTION:When a request for instruction prefetching is made in a cycle T1 of detecting operation, the incrementer (INC) 3 selects a next instruction address +alpha. In a cycle T2, contents of bits 2<4> and 2<3> of a next instruction address register (NIA) 1 and a store address register SA2 are supplied to a confliction (Conf) occurrence possibility decision circuit 7. Then, 0 or 16 is added to the result of the Conf occurrence possibility decision and the contents of the NIA 1 and the results are compared in terms of bit with the contents of the SA2 up to bits 2<23>-2<5>, so that an AND circuit 8 detects a store instruction Conf according to the comparison result. |
