| 摘要 |
PURPOSE:To detect an erroneous action arising on a word line and to prevent the data destruction by providing an adder and verifying the single system of a word selecting signal generated from a control circuit and that inputted to a storage element. CONSTITUTION:A single system checking circuit is composed of adders 201, 202 and 203 and the like, and testifies the single system of four bits of word selecting signals W1-W4 inputted to a memory 108. Namely, when the signals W1-W4 inputted to the memory 108 act abnormally, more than two bits among four come to '1', and a multiple word is selected, or all four bits comes to zero, which means the state where no word is selected. Where more than two bits come to '1', any one or more of the address 201, 202 and 203 generate their carry, and the word abnormality is reported to a CPU 101 through an OR gate 206. Then the CPU 101 inhibits the read and write of data in the memory 108. When all bits are zero, the same operation is done, and accordingly the data destruction can be prevented.
|
