发明名称 MEMORY CONTROL SYSTEM
摘要 PURPOSE:To process effectively an access request while keeping the sequential properties given from the same access request controller, by adding the information on the order of transmission to the access request given from the access request controller and securing communication among access request priority deciding devices provided to each port. CONSTITUTION:Each of access controllers 20-23 can set the access requests of two of ports 1-4 at a time at two of latches 310B-313B with an access request stack device 300, for example. A logic part 30OF for production of transmission order information adds signals 90-93 showing the 2nd access request to the one of two access requests that is delivered later and transmits access request set signals 50-57 to store them in latches 310B-E and 310O-R of access request order deciding devices 310-313. A function is added to a logic part 310G to avoid input of the access request in the latch 310B to the priority order deciding logic parts 310A and 310K when the latch 310O is set at 1.
申请公布号 JPS60215258(A) 申请公布日期 1985.10.28
申请号 JP19840070803 申请日期 1984.04.11
申请人 HITACHI SEISAKUSHO KK 发明人 WADA HIDEO
分类号 G06F12/06 主分类号 G06F12/06
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